Display apparatus and headphone control circuit thereof

ABSTRACT

Provided are a display apparatus and a headphone control circuit thereof including a main chip, a headphone port and a switch circuit including a control circuit, a left channel switch and a right channel switch, the control circuit, the left channel switch and the right channel switch connecting to the main chip, the control circuit connecting to the left channel switch and the right channel switch, the left channel switch and the right channel switch connecting to the headphone port; the control circuit configured to receive a control signal output from the main chip and, output according to the control signal a first signal to the left channel switch and a second signal to the right channel switch respectively, the first signal is used to control on or off of the left channel switch, and the second signal is used to control on or off of the right channel switch.

CROSS-REFERENCE TO RELATED APPLICATIONS

The patent application is a continuation of International ApplicationNo. PCT/CN2019/093708, filed on Jun. 28, 2019, which claims the priorityof the Chinese Patent Application No. 201810782471.0, filed on Jul. 17,2018, the content of the two is hereby incorporated by reference hereinin their entireties.

TECHNICAL FIELD

The present disclosure relates to the field of display apparatustechnologies and, especially to a display apparatus and a headphonecontrol circuit thereof.

BACKGROUND

With rapid development of the display apparatus technologies, in orderto meet increasing demands for diversification from consumers, manydisplay apparatuses such as televisions and computer monitors areequipped with headphone circuits to realize the function of playingaudio signal. In addition to main speaker, the audio signal from themain chip of a display apparatus can be transmitted by a headphone afterbeing amplified by the power amplifier in the headphone circuit. Inorder to enable the user to enjoy a TV show without affecting the restof others around, the speaker of the display apparatus can be muted byinserting the headphone into the headphone jack on the displayapparatus.

SUMMARY

This section provides a general summary of the disclosure, and is not acomprehensive disclosure of its full scope or all of its features.

Some embodiments in this disclosure provide a headphone control circuitof a display apparatus, including:

a main chip;

a headphone port; and

a switch circuit, where the switch circuit includes a control circuit, aleft channel switch and a right channel switch, where the controlcircuit, the left channel switch and the right channel switch areconnected to the main chip, the control circuit is connected to the leftchannel switch and the right channel switch, and the left channel switchand the right channel switch are connected to the headphone port; and

the control circuit is configured to receive a control signal outputfrom the main chip and, output, according to the control signal, a firstsignal to the left channel switch and a second signal to the rightchannel switch respectively, where the first signal is used to controlon or off of the left channel switch, and the second signal is used tocontrol on or off of the right channel switch.

Some embodiments in this disclosure provide a display apparatus,including a headphone control circuit, where the headphone controlcircuit includes:

a main chip;

a headphone port; and

a switch circuit, where the switch circuit includes a control circuit, aleft channel switch and a right channel switch, where the controlcircuit, the left channel switch and the right channel switch areconnected to the main chip, the control circuit is connected to the leftchannel switch and the right channel switch, and the left channel switchand the right channel switch are connected to the headphone port; and

the control circuit is configured to receive a control signal outputfrom the main chip and, output, according to the control signal, a firstsignal to the left channel switch and a second signal to the rightchannel switch respectively, where the first signal is used to controlon or off of the left channel switch, and the second signal is used tocontrol on or off of the right channel switch.

BRIEF DESCRIPTION OF DRAWING(S)

In order to describe technical solutions in the embodiments of thepresent disclosure or the related art more clearly, accompanyingdrawings used in description of the embodiments or the related art willbe briefly described hereunder. Obviously, the described drawings aremerely some embodiments of present disclosure. For persons skilled inthe art, other drawings may be obtained based on these drawings withoutany creative effort.

FIG. 1A is a schematic structural diagram of a headphone control circuitof a display apparatus in the related art;

FIG. 1B is a schematic structural diagram of a headphone control circuitof a display apparatus in the related art;

FIG. 2 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 3 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 4 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 5 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 6 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 7 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure;

FIG. 8 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure; and

FIG. 9 is a schematic structural diagram of an embodiment of a displayapparatus according to the present disclosure.

Specific embodiments of the present disclosure have been shown throughthe above drawings, which will be described in more detail later. Thesedrawings and the text description are not intended to limit the scope ofthe present disclosure in any way, but to illustrate concepts of thepresent disclosure to those skilled in the art upon reference to thespecific embodiments.

DESCRIPTION OF EMBODIMENTS

The technical solutions in the embodiments of the present disclosurewill be described hereunder clearly and comprehensively with referenceto the accompanying drawings in the embodiments of the presentdisclosure. Obviously, the described embodiments are merely a part ofembodiments of the present disclosure, rather than all embodiments ofthe present disclosure. All other embodiments obtained by persons ofordinary skill in the art based on the embodiments of the presentdisclosure without any creative effort should fall into the protectionscope of the present disclosure.

Terms such as “first”, “second”, “third”, “fourth”, etc. (if present) inthe specification and the claims as well as the described accompanydrawings of the present disclosure are used to distinguish similarobjects, but not intended to describe a specific order or sequence. Itwill be appreciated that the data used in this way is interchangeableunder appropriate circumstances, such that the embodiments of thepresent disclosure described herein can be implemented in an order otherthan those illustrated or described herein, for instance. Moreover,terms such as “include” and “have” and any variation thereof areintended to cover a non-exclusive inclusion, e.g., processes, methods,systems, products or devices that encompass a series of steps or unitsare not necessarily limited to those steps or units that are clearlylisted, but may include other steps or units that are not explicitlylisted or inherent to these processes, methods, products or devices.

FIG. 1A and FIG. 1B are schematic structural diagrams of a headphonecontrol circuit of a display apparatus in the related art. In therelated headphone control circuit of the display apparatus shown in FIG.1A, since an audio signal output from the main chip has low power thatcannot satisfied the minimum output power required for the headphone inthe headphone port to play, the audio signal output from the main chipwill pass through a power amplifier chip and then is output to theheadphone port in order that the output audio signal from the headphoneport will satisfy the minimum output power of the headphone.

In the related art, when the sound of the display apparatus is outputfrom the headphone, if the user needs to perform a mute operation on theheadphone output, the headphone of the display apparatus can be muted intwo ways: one is capacitor discharge within the control circuit when thedisplay apparatus is turned off, a change in the control circuit from ahigh level to a low level resulting from the capacitor dischargegenerates a control signal output to the power amplifier chip, thecontrol signal is used to enable the power amplifier chip to disconnectthe audio signal output from the main chip to the headphone port suchthat the headphone is muted; the other is, for instance, an operation ona remote controller, when the control circuit receives a mute controlsignal from the remote controller of the display apparatus, the controlcircuit outputs the control signal to the power amplifier chip tocontrol the power amplifier chip to implement the mute of the headphone.

The headphone control circuit of the display apparatus as shown in FIG.1B is a possible implementation of the headphone control circuit in FIG.1A. The power amplifier chip is a chip denoted as N119 in the drawing,and the headphone port is a port denoted as XS9 in the drawing. Theinterface (denoted as HP_Audio-L) of the main chip is connected to thepin (denoted as 13) of the power amplifier chip N119 of the headphone,used for the main chip to output a left channel audio signal to thepower amplifier chip; after being amplified by the power amplifier chipN119 of the headphone, the left channel audio signal passes through thepin denoted as 12 to output the audio signal HP_LOUT to the interface Ldenoted as 1 in the headphone port XS9 such that the amplified leftchannel audio signal is provided for the headphone. Similarly, theinterface denoted as HP_Audio-R is connected to the pin (denoted as 2)of the power amplifier chip N119 of the headphone, used for the mainchip to output a right channel audio signal to the power amplifier chipof the headphone; after being amplified by the power amplifier chip N119of the headphone, the right channel audio signal passes through the pindenoted as 3 to output the audio signal HP_ROUT to the interface Rdenoted as 2 in the headphone port XS9 such that the amplified rightchannel audio signal is provided for the headphone.

The power amplifier chip N119 of the headphone also provides a pindenoted as 5 for enabling mute control of the headphone. After the poweramplifier chip N119 of the headphone receives a mute control signalMUTE_HP through the pin denoted as 5, it stops outputting the rightchannel audio signal through the pin denoted as 3 and stops outputtingthe left channel audio signal through the pin denoted as 12, therebyachieving turnoff of an output sound from the headphone of the displayapparatus.

For the circuit shown in FIG. 2, the mute control signal MUTE HP forcontrolling the power amplifier chip has two generation modes.

The first is that when the display apparatus is turned off, the inputvoltage denoted as +5V_Normal in the drawing is reduced to 0V, andmeanwhile the negative electrode of the capacitor denoted as C933 isgrounded. At this point, the capacitor C933 needs to be dischargedthrough the resistor denoted as R1000. After the capacitor C933 isdischarged, the emitter of the triode V82 connected to the positiveelectrode of the capacitor is at a high level. However, since +5V_Normalwill be 0V, the base of the triode V82 is also reduced to a level of 0V,and the triode V82 becomes conducting. After the triode V82 becomesconducting, the collector of the triode V82 outputs a high level, andthe diode VD54 becomes conducting; similarly, 12VS rapidly drops to 0Vwhen the power is turned off, the capacitor C9343 is discharged, and thediode BAT54C is turned on; in addition, when the power is turned off,the mute control signal MUTE_HP cannot be received, thus the diode VD50is cut off. In summary, the triode V81 has a high level at the base, thetriode V81 becomes conducting, and its collector is pulled down, that isto say, after the high level output from the collector of the triode V82is inverted by the triode V81, the low level signal which is finallyobtained is the mute control signal MUTE_HP. The mute control signalMUTE_HP is input into the power amplifier chip N119 of the headphonethrough the pin denoted as 5 in the chip N119. After the power amplifierchip N119 of the headphone receives the low level mute control signal atthe pin denoted as 5, it stops outputting the audio signal to theheadphone port XS9 such that the headphone is muted. The capacitors C933and C934 function to use capacitor discharge to maintain the pin denotedas 5 of the headphone power amplifier chip at a low voltage when thedisplay apparatus is turned off, so that the headphone power amplifierchip outputs no audio signal at the pins denoted as 3 and 12, therebypreventing the main chip from outputting some uncontrollable audiosignals after the display apparatus is turned off, which in turn willaffect user experience.

The second is that the diode denoted as VD50 receives a software muteindication signal AMP_MUTE through the interface denoted as 1, such asthe software mute indication signal transmitted by the remote controllerof the display apparatus; the mute indication signal AMP_MUTE is a highlevel signal, at this point, the diode VD50 becomes conducting; inaddition, since the system operates normally, the branches where thecapacitors C933 and C934 reside are disconnected, and the diode VD54 andthe diode BAT54C are cut off. Therefore, the triode V81 has a high levelat the base, and the triode V81 becomes conducting, that is, after thesoftware mute indication signal AMP_MUTE is also inverted by the triodeV81, the mute control signal MUTE_HP is obtained and input into thepower amplifier chip N119 of the headphone at the pin denoted as 5 sothat the power amplifier chip N119 of the headphone implements the muteof the headphone.

In summary, due to incorporation of capacitors, the structure of theheadphone control circuit in the above related art is to ensure the muteof the display apparatus upon the turnoff thereof, but the capacitorsbelong to analog components, and as the apparatus ages and is damaged, aphenomenon that the display apparatus also outputs uncontrollable noiseand pops upon its turnoff will also occur, which affects userexperience.

In addition, since the control signal transmitted by the control circuitto the power amplifier chip needs to be subjected to an inverseoperation, and the power amplifier chip also needs to perform anoperation in which it stops outputting the audio signal to the headphoneport according to the control signal. These steps all have a certaindelay for the headphone mute control. Therefore, the case that eitherthe control signal is generated due to the capacitor discharge at theturnoff of the display apparatus or is generated due to the control fromthe user's remote controller will cause a low response speed at whichthe headphone of the display apparatus is muted; also, the userexperience of the display apparatus is further reduced.

The present disclosure provides a headphone control circuit of a displayapparatus, the mute operation of the headphone at the turnoff of thedisplay apparatus is improved by simplifying the headphone controlcircuit of the display apparatus, so that the display apparatus will notoutput uncontrollable noise, thereby improving user experience of thedisplay apparatus.

The technical solutions of the present disclosure will be describedhereunder in detail with specific embodiments. The specific embodimentshereinafter may be combined with each other, and for the same or similarconcepts or processes, details may be omitted in some embodiments.

FIG. 2 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. As shown in FIG. 2, the headphone control circuit of thedisplay apparatus provided in the present embodiment includes: a mainchip 1, a switch circuit 2 and a headphone port 3. The main chip 1 isconnected to the headphone port 3 through the switch circuit 2. An audiosignal output from the main chip 1 can be output to the headphone port 3through the switch circuit 2, and the audio signal output from the mainchip 1 has power greater than or equal to preset power of a headphone inthe headphone port 3, the main chip 1 is configured to output a controlsignal to the switch circuit 2, and the control signal is used to switchthe switch circuit 2 to an off state or an on state.

In the headphone control circuit of the display apparatus according tothe present embodiment, the audio signal output from the main chip 1 hasbeen amplified to first power, where the first power is greater than orequal to preset power of the headphone, the preset power may be theminimum output power of the headphone, and the minimum output power ofthe headphone is power of an audio signal that can be output normallywhen the headphone is tuned to the lowest sound. For instance, if acertain headphone has minimum output power of 5 milliwatts (mw), thenthe first power for the audio signal that can be output from the mainchip 1 at this time needs to be greater than or equal to 5 mw. Ifdifferent headphones have different minimum output power, the main chip1 may determine the minimum output power of the headphones by way of theheadphones detecting or reporting their modes, which is not specificallylimited in the present embodiment. Optionally, in order to improve soundquality of the audio signal output from the main chip, the audio signaloutput from the main chip may further pass through aResistance-Capacitance (RC) filter, also known as a phase shift filter,and be input to the headphone port after a filtered interferencecancellation. The foregoing preset power may also be greater than theminimum output power, and the implementation thereof is similar, forwhich details will be omitted.

In some embodiments, such as the headphone control circuit of thedisplay apparatus shown in FIG. 2, when the switch circuit 2 is in an onstate, the path from the main chip 1 to the headphone port 3 becomesconducting, and the audio signal output from the main chip 1 can beoutput to the headphone port 3 through the switch circuit 2 to providean audio signal for the headphone in the headphone port 3; when theswitch circuit 2 is in an off state, the path from the main chip 1 tothe headphone port 3 is disconnected, and the audio signal output fromthe main chip 1 cannot be output to the headphone port 3 through theswitch circuit 2, thereby implementing the mute of the headphone. Theoff state and the on state of the switch circuit 2 can be switched inaccordance to a control signal transmitted by the main chip 1. Forinstance, when the main chip 1 transmits a high level control signal tothe switch circuit 2, the switch circuit 2 is switched on; when the mainchip 1 transmits a low level control signal to the switch circuit 2, theswitch circuit 2 is switched off. The form in which the control signalis at a high/low level is merely an example, and a specific form of thecontrol signal is not limited in the present embodiment.

In some embodiments, the control signal for switching the state of theswitch circuit 2 in the present embodiment can also be generated bypower off and receiving a mute indication. Illustrations are made bytaking the high/low level in the above example as an example, the pinused for the main chip 1 to output signal to the switch circuit 2provides that the control signal output by default is a low levelcontrol signal, that is, the control signal output from the main chip 1to the switch circuit 2 is a low level control signal when no headphoneis inserted into the headphone port 3 or the power is not on, so that adefault state of the switch circuit 2 is the off state. When it isdetected that the headphone is inserted into the headphone port 3 (forthe detection method, reference may be made to the embodiment of FIG. 7or FIG. 8), the main chip 1 outputs a high level control signal to theswitch circuit 2 to switch the switch circuit 2 to the on state, so thatthe audio signal output from the main chip 1 can be output to theheadphone port 3 through the switch circuit 2. Therefore, when thedisplay apparatus is turned off, the main chip is powered down, and thepin used for the main chip to output the control signal to the switchcircuit 2 restores the low level control signal output by default, sothat the state of the switch circuit 2 is switched to or proceed tomaintain in the off state. Therefore, the mute of the headphone isimplemented for the display apparatus.

In addition, during implementation of the mute of the headphone for thedisplay apparatus in a mute indication manner, a mute indicationtransmitted by, for instance, the remote controller of the displayapparatus can be received, and the mute indication may be directlyoutput to the switch circuit 2 by means of a control signal, so that theswitch circuit 2 is switched to the off state, implementing the mute ofthe headphone for the display apparatus. Alternatively, after the mainchip receives the mute indication, the control signal may be transmittedby the main chip to the switch circuit 2, so that the switch circuit 2is switched to the off state, implementing the mute of the headphone forthe display apparatus.

Therefore, in summary, in the headphone control circuit of the displayapparatus according to the present embodiment, since the main chipdirectly outputs an audio signal satisfying the minimum output power ofthe headphone, the power amplifier chip may not be provided in theheadphone control circuit of the display apparatus, and the audio signalof the main chip may be directly input into the headphone port throughthe switch circuit. Hence, when the headphone control circuit of thedisplay apparatus is controlling the headphone of the display apparatusto be muted, it is not necessary to implement the mute of the headphonethrough the manner in the related art that the main chip indirectlycontrols the headphone power amplifier chip, instead the main chip mayimplement the mute of the headphone directly through on and off of theswitch circuit, thereby reducing circuit complexity of the headphonecontrol circuit for the display apparatus. Moreover, when the mute ofthe headphone is implemented through the main chip directly controllingthe on and off of the switch circuit, a capacitor for controlling themute of the power amplifier chip when the display apparatus is turned onand turned off will not be provided in the headphone control circuit ofthe display apparatus, nor will occur a phenomenon that the displayapparatus still outputs uncontrollable noise and pops upon its turnoffdue to failed control of the mute of the power amplifier chip resultingfrom aging and damage of the capacitor, thereby improving the soundquality of the headphone for the display apparatus when the headphone ismuted, and improving user experience of the display apparatus.

In addition, according to the headphone control circuit of the displayapparatus provided in the present embodiment, since the main chip mayimplement the mute of the headphone directly through on and off of theswitch circuit, for the case that either the headphone is muted when thedisplay apparatus is turned off or the headphone is muted due to thecontrol from the user's remote controller, the mute of the headphonewill be implemented by controlling the main chip to transmit a controlsignal directly to the switch circuit. Compared with the related artwhere the main chip indirectly controls the power amplifier chip toimplement the mute of the headphone, this is more direct, which reducescomplexity and time complexity of the headphone control circuit of thedisplay apparatus, reduces the response time for the headphone of thedisplay apparatus to mute, and further improves user experience of thedisplay apparatus.

FIG. 3 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. The headphone control circuit shown in FIG. 3 is based onthe embodiment shown in FIG. 2. The switch circuit 2 includes a controlcircuit 21, a left channel switch 22, and a right channel switch 23. Aleft channel audio signal output from the main chip 1 can be output tothe headphone port 3 through the left channel switch 22, and a rightchannel audio signal output from the main chip 1 can be output to theheadphone port 3 through the right channel switch 23. The controlcircuit 21 is configured to receive a control signal output from themain chip 1 and, output, according to the control signal, a first signalto the left channel switch 22 and a second signal to the right channelswitch 23, where the first signal is used to control on and off of theleft channel switch 22, and the second signal is used to control on andoff of the right channel switch 23.

In some embodiments, in the embodiment shown in FIG. 3 which is based onthe embodiment shown in FIG. 2, the audio signal output from the mainchip 1 is further divided into a left channel audio signal and a rightchannel audio signal, the two signals are transmitted to the headphoneport 3 after passing through different switches within the switchcircuit 2, and the headphone in the headphone port 3 can finally outputtwo kinds of audio signals according to the received left channel audiosignal and the right channel audio signal. The control circuit 21 cancontrol on and off of the left channel switch 22 and the right channelswitch 23. Generally, the control circuit 21 needs to control the leftchannel switch 22 and the right channel switch 23 according to thereceived control signal, open or closed simultaneously. Whereappropriate, the control circuit 21 can also separately control the leftchannel switch 22 and the right channel switch 23 to be in differentstates, an open or on state, which is not limited in the presentembodiment.

When the control circuit 21 controls the left channel switch 22 to beclosed, the left channel audio signal output from the main chip 1 can betransmitted to the headphone port 3 through the left channel switch 22that is closed; when the control circuit 21 controls the left channelswitch 22 to be open, the left channel audio signal output from the mainchip 1 cannot be transmitted to the headphone port 3 through the leftchannel switch 22 that is open, implementing the mute of the leftchannel of the headphone. Similarly, when the control circuit 21controls the right channel switch 23 to be closed, the right channelaudio signal output from the main chip 1 can be transmitted to theheadphone port 3 through the right channel switch 23 that is closed;when the control circuit 21 controls the right channel switch 23 to beopen, the right channel audio signal output from the main chip 1 cannotbe transmitted to the headphone port 3 through the right channel switch23 that is open, implementing the mute of the right channel of theheadphone.

FIG. 4 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. The headphone control circuit shown in FIG. 4 provides amore specific implementation on the basis of the embodiment shown inFIG. 3, where the control circuit 21 is a first switch, the left channelswitch 22 is a second switch, and the right channel switch 23 is a thirdswitch.

In some embodiments, the first switch has its first terminal connectedto the main chip for receiving a control signal output from the mainchip; the first switch has its second terminal connected to the leftchannel switch for outputting the first signal to the left channelswitch; the first switch has its second terminal further connected tothe right channel switch for outputting the second signal to the rightchannel switch, and the first switch has its third terminal grounded.The second switch has its first terminal connected to the main chip forreceiving the left channel audio signal output from the main chip; thesecond switch has its second terminal connected to the headphone portfor outputting the left channel audio signal to the headphone port; andthe second switch has its third terminal connected to the secondterminal of the first switch for receiving the first signal. The thirdswitch has its first terminal connected to the main chip for receivingthe right channel audio signal output from the main chip; the thirdswitch has its second terminal connected to the headphone port foroutputting the right channel audio signal to the headphone port; and thethird switch has its third terminal connected to the second terminal ofthe first switch for receiving the second signal.

In some embodiments, when the first switch receives the control signaltransmitted by the main chip, on and off of the second switch and on andoff of the third switch can be controlled according to the controlsignal. When the first switch controls the second switch to be closedthrough the first signal, the left channel audio signal output from themain chip can be transmitted to the headphone port through the secondswitch that is closed; when the first switch controls the second switchto be open through the first signal, the left channel audio signaloutput from the main chip cannot be transmitted to the headphone portthrough the second switch that is open, implementing the mute of theleft channel of the headphone. Similarly, when the first switch controlsthe third switch to be closed through the second signal, the rightchannel audio signal output from the main chip can be transmitted to theheadphone port through the third switch that is closed; when the firstswitch controls the third switch to be open through the second signal,the right channel audio signal output from the main chip cannot betransmitted to the headphone port through the third switch that is open,implementing the mute of the right channel of the headphone.

In the example shown in FIG. 4, the first signal output from the firstswitch to the second switch and the second signal output to the thirdswitch are the same signal output from the first switch, forimplementing on or off of the second switch and the third switch at thesame time. That is, in order to simultaneously control the states of thesecond switch and the third switch, two different signals are output tothe second switch and the third switch, respectively, only due to theconnection mode of the circuit. However, in order to separately controlthe second switch and the third switch to be open or closed, one outputof the first switch may be connected to the second switch, and the otheroutput is connected to the third switch; moreover, the first signal isoutput to the second switch, and the second signal inverse to the firstsignal is output to the third switch, thereby implementing separatecontrol of the second switch and the third switch, for a specificimplementation thereof, details will be omitted.

In some embodiments, FIG. 5 is a schematic structural diagram of anembodiment of a headphone control circuit of a display apparatusaccording to the present disclosure. According to the headphone controlcircuit shown in FIG. 5 which is based on the embodiment shown in FIG.4, the forgoing switches are implemented by a triode and a metal oxidesemiconductor (MOS) transistor. Each one of the first switch, the secondswitch and the third switch may be a triode or an MOS transistor, andthe three switches may be arbitrarily combined. In one implementation,as shown in FIG. 5, the first switch serving to receive the controlsignal may be a triode, since the MOS transistor has a stronger drivingcapability relative to the triode, the second switch and the thirdswitch for transmitting the audio signals may be MOS transistors.

FIG. 6 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. FIG. 6 shows a circuit connection mode of the controlcircuit 2 in the embodiment of FIG. 5 described previously. The triodedenoted as V31 may be the first switch described in the aboveembodiment, the MOS transistor denoted as V84 may be the second switchdescribed in the above embodiment, the MOS transistor denoted as V85 maybe the third switch described in the above embodiment, and the portdenoted as XS9 may be the headphone port described in the aboveembodiment.

In some embodiments, the main chip is connected to the second switch V84in the control circuit at the pin denoted as HP_Audio-L for the mainchip to output the left channel audio signal HP_LOUT to the pin denotedas L of the headphone port XS9 through the second switch V84; the mainchip is connected to the third switch V85 in the control circuit at thepin denoted as HP_Audio-R for the main chip to output the right channelaudio signal HP_ROUT to the pin denoted as R of the headphone port XS9through the third switch V85. The main chip is connected to the firstswitch V31 through the pin denoted as HP_SWITCH, and the main chipoutputs a control signal to the first switch V31 through this pin, sothat the first switch V31 controls states of the second switch V84 andthe third switch V85 according to the control signal.

In some embodiments, the pin HP_SWITCH of the main chip is a generalpurpose input/output GPIO port of the main chip, that is, the main chipoutputs a control signal to the control circuit through its GPIO port.The purpose of providing the first switch V31 in the circuit shown inFIG. 6 is to increase the driving capability of the control signal andmaintain a high-impedance state for the GPIO port of the main chip.

In some embodiments, in the example depicted in FIG. 6, the controlsignal may be a high level signal output from the main chip through thepin HP_SWITCH. The first switch V31 has a high level at the base, thefirst switch V31 becomes conducting, and the collector and the emitterof the first switch V31 become conducting. The first switch V31 has itsemitter grounded, and the collector is at a low level, the collector ofthe first switch V31 outputs a low level to the gate of the secondswitch V84 and the gate of the third switch V85, so that the secondswitch V84 and the third switch V85 are cut off, the drain and thesource of the second switch V84 are disconnected, and the drain and thesource of the third switch V85 are disconnected, which in turn makesthat the left channel audio signal HP_LOUT in the interface HP_Audio-Lconnected to the drain of the second switch V84 cannot be output to thepin denoted as L in the headphone port through the second switch V84,implementing the mute of the left channel of the headphone, and whichmakes that the right channel audio signal HP_ROUT in the interfaceHP_Audio-R connected to the drain of the third switch cannot be outputto the pin denoted as R in the headphone port through the third switchV85, implementing the mute of the right channel of the headphone.

In the specific circuit connection of FIG. 6 described above, thecontrol signal being a high level signal is merely an example. Thecontrol signal may also be a low level signal, and it only needs toadjust the circuit connection relationship shown in FIG. 6, forinstance, by adding a triode to re-invert the control signal, the samecontrol mode as in FIG. 6 can be achieved, and a specific implementationof the control signal is not limited in the present embodiment.

In summary, according to the headphone control circuit of the displayapparatus provided in the present embodiment, a control signal istransmitted to the control circuit through the GPIO port of the mainchip, and the control circuit can directly control the off state or theon state of the left channel switch and the right channel switchaccording to the control signal. When the left channel switch and theright channel switch of the control circuit are simultaneously open, themute of the headphone can be implemented for the display apparatus.Therefore, a function of mute control on the headphone of the displayapparatus is achieved in a relatively simple circuit connection manner,the headphone power amplifier circuit is simplified, the cost of themain board of the display apparatus is reduced, and the circuit candirectly control the control circuit through the main chip to implementthe mute of the headphone. There is no need to provide, in the controlcircuit, a capacitor for controlling the mute of the power amplifierchip when the display apparatus is turned on and turned off will not beprovided, nor will occur a phenomenon that the display apparatus stilloutputs uncontrollable noise and pops upon its turnoff due to failedcontrol of the mute of the power amplifier chip resulting from aging anddamage of the capacitor, thereby improving the sound quality of theheadphone for the display apparatus when the headphone is muted, andimproving user experience of the display apparatus.

FIG. 7 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. Based on the above embodiment, the headphone control circuitshown in FIG. 7 further includes: a detection circuit 4 having its firstterminal connected to the main chip 1 and its second terminal connectedto the headphone port 3, where the main chip 1 detects via the detectioncircuit 4 whether a headphone is inserted into the headphone port 3, andwhen the headphone is inserted into the headphone port 3, the main chip1 controls a speaker of the display apparatus to be muted.

FIG. 8 is a schematic structural diagram of an embodiment of a headphonecontrol circuit of a display apparatus according to the presentdisclosure. Taking the specific circuit connection mode in FIG. 8 as anexample, the detection circuit has its first terminal connected to thepin HPDET of the main chip, its second terminal connected to the pin SWof the headphone port XS9, and its third terminal connected to the pinGND of the headphone port XS9. The pin HPDET of the main chip isconfigured to detect via the detection circuit whether a headphone isinserted into the headphone port. When the headphone is inserted intothe headphone port XS9, the pins denoted as SW and GND in the headphoneport XS9 become conducting. The pin GND is a ground pin, and the pin SWis used for connection with the pin HPDET of the main chip through thedetection circuit. When the headphone is inserted into the headphoneport, a path from the pin SW to the pin GND of the headphone is formed.In this path, there will be a level change in the pin HPDET of the mainchip since the GND interface is grounded. When the main chip determinesvia the level change of the pin HPDET that a headphone is inserted intothe headphone port XS9, the main chip outputs a control signal to thefirst switch V31 through the pin HP_SWITCH to finally control theheadphone of the display apparatus to be muted.

FIG. 9 is a schematic structural diagram of an embodiment of a displayapparatus according to the present disclosure. As shown in FIG. 9, thedisplay apparatus 9 provided in the present embodiment includes theheadphone control circuit 91 of the display apparatus according to anyof embodiments depicted in FIG. 1-FIG. 8. The display apparatus 9 may bean apparatus for displaying, such as a television, a computer monitor,or a video player.

The above descriptions are merely preferred embodiments of the presentdisclosure, and shall not be considered as a limitation to the presentdisclosure in any way. Any simple amendment, equivalent variation andmodification made to the above embodiments according to the technicalessence of the present disclosure shall fall into the scope of thetechnical solutions of the present disclosure.

Finally, it should be noted that the foregoing embodiments are merelyintended for describing the technical solutions of the presentdisclosure rather than limiting the present disclosure. Although thepresent disclosure is described in detail with reference to theforegoing embodiments, persons of ordinary skill in the art shouldunderstand that they may still make amendments to the technicalsolutions described in the foregoing embodiments, or make equivalentreplacements to some or all technical features therein; however, theseamendments or replacements do not make the essence of correspondingtechnical solutions depart from the scope of the technical solutions inthe embodiments of the present disclosure.

What is claimed is:
 1. A headphone control circuit of a displayapparatus, comprising: a main chip; a headphone port; a switch circuit,which comprises a control circuit, a left channel switch and a rightchannel switch, wherein the control circuit, the left channel switch andthe right channel switch are connected to the main chip, the controlcircuit is connected to the left channel switch and the right channelswitch, and the left channel switch and the right channel switch areconnected to the headphone port; where the control circuit is configuredto receive a control signal output from the main chip and, output,according to the control signal, a first signal to the left channelswitch and a second signal to the right channel switch respectively,wherein the first signal is used to control on or off of the leftchannel switch, and the second signal is used to control on or off ofthe right channel switch.
 2. The circuit according to claim 1, wherein aleft channel audio signal output from the main chip can be output to theheadphone port through the left channel switch, and a right channelaudio signal output from the main chip can be output to the headphoneport through the right channel switch.
 3. The circuit according to claim2, wherein the left channel audio signal and the right channel audiosignal have power greater than or equal to a preset power, wherein thepreset power, wherein the preset power is a minimum output power of aheadphone in the headphone port.
 4. The circuit according to claim 1,wherein the control circuit comprises a first switch; wherein a firstterminal of the first switch being connected to the main chip forreceiving a control signal output from the main chip, a second terminalof the first switch being connected to both the left channel switch foroutputting the first signal to the left channel switch and the rightchannel switch for outputting the second signal to the right channelswitch; and a third terminal of the first switch being grounded.
 5. Thecircuit according to claim 4, wherein the left channel switch comprisesa second switch; wherein a first terminal of the second switch beingconnected to the main chip for receiving the left channel audio signaloutput from the main chip; a second terminal of the second switch beingconnected to the headphone port for outputting the left channel audiosignal to the headphone port; and a third terminal of the second switchbeing connected to the second terminal of the first switch for receivingthe first signal.
 6. The circuit according to claim 5, wherein the rightchannel switch comprises a third switch; wherein a first terminal of thethird switch being connected to the main chip for receiving the rightchannel audio signal output from the main chip; a second terminal of thethird switch being connected to the headphone port for outputting theright channel audio signal to the headphone port; and a third terminalof the third switch being connected to the second terminal of the firstswitch for receiving the second signal.
 7. The circuit according toclaim 6, wherein the first switch is a triode, and the second switch andthe third switch are metal oxide semiconductor (MOS) transistors.
 8. Thecircuit according to claim 7, wherein the first terminal of the firstswitch is a base, the second terminal of the first switch is acollector, and the third terminal of the first switch is an emitter; thefirst terminal of the second switch is a drain, the second terminal ofthe second switch is a gate, and the third terminal of the second switchis a source; and the first terminal of the third switch is a drain, thesecond terminal of the third switch is a gate, and the third terminal ofthe third switch is a source.
 9. The circuit according to claim 8,wherein when the control signal is a high level signal, the collectorand the emitter of the first switch become conducting after the firstswitch receives the high level signal at the base; the first switch hasa low level at the collector and outputs a low level signal to the gateof the second switch and the gate of the third switch such that thedrain and the source of the second switch are disconnected and the drainand the source of the third switch are disconnected; when the controlsignal is a low level signal, the collector and the emitter of the firstswitch are disconnected after the first switch receives the low levelsignal at the base; the first switch has a high level at the collectorand outputs a high level signal to the gate of the second switch and thegate of the third switch such that the drain and the source of thesecond switch become conducting and the drain and the source of thethird switch become conducting.
 10. The circuit according to claim 1,wherein the main chip outputs the control signal to the control circuitspecifically through a general-purpose input/output (GPIO) port.
 11. Thecircuit according to claim 1, further comprising: a detection circuit; afirst terminal of the detection circuit being connected to the main chipand a second terminal of the detection circuit connected to theheadphone port, wherein the main chip detects via the detection circuitwhether a headphone is inserted into the headphone port, and when theheadphone is inserted into the headphone port, the main chip controls aspeaker of the display apparatus to be muted.
 12. A display apparatus,comprising: a headphone control circuit, wherein the headphone controlcircuit comprises: a main chip; a headphone port; a switch circuit,which comprises a control circuit, a left channel switch and a rightchannel switch, wherein the control circuit, the left channel switch andthe right channel switch are connected to the main chip, the controlcircuit is connected to the left channel switch and the right channelswitch, and the left channel switch and the right channel switch areconnected to the headphone port; where the control circuit is configuredto receive a control signal output from the main chip and, output,according to the control signal, a first signal to the left channelswitch and a second signal to the right channel switch respectively,wherein the first signal is used to control on or off of the leftchannel switch, and the second signal is used to control on or off ofthe right channel switch.
 13. The display apparatus according to claim12, wherein a left channel audio signal output from the main chip can beoutput to the headphone port through the left channel switch, and aright channel audio signal output from the main chip can be output tothe headphone port through the right channel switch.
 14. The displayapparatus according to claim 12, wherein the left channel audio signaland the right channel audio signal have power greater than or equal to apreset power, wherein the preset power is a minimum output power of aheadphone in the headphone port.
 15. The display apparatus according toclaim 12, wherein the control circuit comprises a first switch; whereina first terminal of the first switch being connected to the main chipfor receiving a control signal output from the main chip, a secondterminal of the first switch being connected to both the left channelswitch for outputting the first signal to the left channel switch andthe right channel switch for outputting the second signal to the rightchannel switch; and a third terminal of the first switch being grounded.16. The display apparatus according to claim 15, wherein the leftchannel switch comprises a second switch; wherein a first terminal ofthe second switch being connected to the main chip for receiving theleft channel audio signal output from the main chip; a second terminalof the second switch being connected to the headphone port foroutputting the left channel audio signal to the headphone port; and athird terminal of the second switch being connected to the secondterminal of the first switch for receiving the first signal.
 17. Thedisplay apparatus according to claim 16, wherein the right channelswitch comprises a third switch; wherein a first terminal of the thirdswitch being connected to the main chip for receiving the right channelaudio signal output from the main chip; a second terminal of the thirdswitch being connected to the headphone port for outputting the rightchannel audio signal to the headphone port; and a third terminal of thethird switch being connected to the second terminal of the first switchfor receiving the second signal.
 18. The display apparatus according toclaim 17, wherein the first switch is a triode, and the second switchand the third switch are metal oxide semiconductor (MOS) transistors;and wherein the first terminal of the first switch is a base, the secondterminal of the first switch is a collector, and the third terminal ofthe first switch is an emitter; the first terminal of the second switchis a drain, the second terminal of the second switch is a gate, and thethird terminal of the second switch is a source; and the first terminalof the third switch is a drain, the second terminal of the third switchis a gate, and the third terminal of the third switch is a source. 19.The display apparatus according to claim 18, wherein when the controlsignal is a high level signal, the collector and the emitter of thefirst switch become conducting after the first switch receives the highlevel signal at the base; the first switch has a low level at thecollector and outputs a low level signal to the gate of the secondswitch and the gate of the third switch such that the drain and thesource of the second switch are disconnected and the drain and thesource of the third switch are disconnected; when the control signal isa low level signal, the collector and the emitter of the first switchare disconnected after the first switch receives the low level signal atthe base; the first switch has a high level at the collector and outputsa high level signal to the gate of the second switch and the gate of thethird switch such that the drain and the source of the second switchbecome conducting and the drain and the source of the third switchbecome conducting.
 20. The display apparatus according to claim 12,wherein further comprising: a detection circuit; a first terminal of thedetection circuit being connected to the main chip and a second terminalof the detection circuit connected to the headphone port, wherein themain chip detects via the detection circuit whether a headphone isinserted into the headphone port, and when the headphone is insertedinto the headphone port, the main chip controls a speaker of the displayapparatus to be muted.